low-latency architecture

Integrated Photonic Platform for the Edge: Accelerated Computing and Low-Latency Authentication

Zhican Zhou, Ph.D. Student, Electrical and Computer Engineering

Jul 8, 16:00 - 17:30

B4 R5209

photonic computing unit integrated photonics neural network QD laser accelerators low-latency architecture privacy preserving techniques

This dissertation develops integrated photonics as a unified hardware platform for parallel computing and chaos-driven dynamic authentication.

Zhican Zhou

Ph.D. Student, Electrical and Computer Engineering

photonic computing unit integrated photonics neural network QD laser accelerators low-latency architecture privacy preserving techniques

Zhican Zhou's research investigates on-chip laser technologies, heterogeneous photonic/memristor computing systems for AI acceleration, and secure hardware architectures for privacy-preserving data processing.

Kuilian Yang

Ph.D. Student, Electrical and Computer Engineering

High Performance Low Power Circuits noise-shaping differential SAR capacitance-digital converter neuromorphic computing Hardware acceleration Efficient AI edge computing low-latency architecture